CTU FEE Moodle
Microelectronics
B232 - Summer 23/24
This is a grouped Moodle course. It consists of several separate courses that share learning materials, assignments, tests etc. Below you can see information about the individual courses that make up this Moodle course.
Microelectronics - B2B34MIT
Main course
| Credits | 4 |
| Semesters | Winter |
| Completion | Graded Assessment |
| Language of teaching | Czech |
| Extent of teaching | 2P+2L |
Annotation
Students become familiar with the latest trends in the field of microelectronics. The course provide students with the microelectronic structures and technologies of integrated circuits; micro sensors and micro-electro-mechanical systems. The course introduces students to the design of nanoelectronics and integrated circuits.
Study targets
The aim of the course is to provide students with modern trends in the field of micro and nano electronics.
Course outlines
1. Evolution of integrated circuits and electronic systems, Moore's Law,
2. Main architectures of microelectronic systems, levels of abstraction
3. Integrated Circuits - importance of integration, technologies and design methods
4. Design methodologies and tools (overview of design technologies and its implementation)
5. Microelectronic components (Mosfet, BJT, passive components)
6. Manufacturing processes of integrated circuits
7. Passive components and power structures in microelectronics circuits
8. On chip signal processing
9. Operation principles of integrated microsensors
10. Microsystems and MEMS (Design of Micro-electro-mechanical systems MEMS, technology, applications)
11. Nanoelectronics, basic solid state physics
12. Optical integrated circuits
13. Diagnostic and testing in electronic systems
14. Reserve
2. Main architectures of microelectronic systems, levels of abstraction
3. Integrated Circuits - importance of integration, technologies and design methods
4. Design methodologies and tools (overview of design technologies and its implementation)
5. Microelectronic components (Mosfet, BJT, passive components)
6. Manufacturing processes of integrated circuits
7. Passive components and power structures in microelectronics circuits
8. On chip signal processing
9. Operation principles of integrated microsensors
10. Microsystems and MEMS (Design of Micro-electro-mechanical systems MEMS, technology, applications)
11. Nanoelectronics, basic solid state physics
12. Optical integrated circuits
13. Diagnostic and testing in electronic systems
14. Reserve
Exercises outlines
1. Introduction, Revision Test
2. Cadence Environment, Schematic, SPECTRE Simulator, Result Exports (PC Cadence)
3. Transistor based Amplifier - Technology Parameters Optimization (PC Cadence)
4. Static and Dynamic Parameters of Transistor based Amplifiers (PC Cadence)
5. Single -Stage Amplifiers CG, CD (PC Cadence)
6. Multistage Amplifiers - Parasitic Parameters Influence (PC Cadence)
7. Differential Amplifiers (PC Cadence)
8. Basic Logic Gates in CMOS Technology (INV,NAND, NOR) (PC Cadence)
9. OrCAD Environment, Schematic Editor, SPICE Simulator, Result Exports (PC OrCAD)
10. Timer Design (Astable, Bistable, Monostable Multivibrator) (PC OrCAD)
11. Timer Application - Measurement of Operating Parameters (Lab)
12. Comparator ADC Design (PC OrCAD)
13. Comparator ADC Realization and Measurement of Operating Parameters (Lab)
14. Assessment Test
2. Cadence Environment, Schematic, SPECTRE Simulator, Result Exports (PC Cadence)
3. Transistor based Amplifier - Technology Parameters Optimization (PC Cadence)
4. Static and Dynamic Parameters of Transistor based Amplifiers (PC Cadence)
5. Single -Stage Amplifiers CG, CD (PC Cadence)
6. Multistage Amplifiers - Parasitic Parameters Influence (PC Cadence)
7. Differential Amplifiers (PC Cadence)
8. Basic Logic Gates in CMOS Technology (INV,NAND, NOR) (PC Cadence)
9. OrCAD Environment, Schematic Editor, SPICE Simulator, Result Exports (PC OrCAD)
10. Timer Design (Astable, Bistable, Monostable Multivibrator) (PC OrCAD)
11. Timer Application - Measurement of Operating Parameters (Lab)
12. Comparator ADC Design (PC OrCAD)
13. Comparator ADC Realization and Measurement of Operating Parameters (Lab)
14. Assessment Test
Literature
P. Gray, P Hurst, s. Lewis, R. Mayer: Analysis and Design of Analog Integrated Circuits, John Wiley and Sons, 2000
B. Razavi: Design of Analog CMOS Integrated Circuits, McGRAW-Hill, 2001
B. Razavi: Design of Analog CMOS Integrated Circuits, McGRAW-Hill, 2001
Requirements
The students are expected to have a good understanding of the electronic components principle (unipolar and bipolar transistor, etc.) and electronics circuit analysis. Students are expected to have knowledge of modelling and simulation of electronic circuits.
Systems on Chip - B4M34ISC
| Credits | 6 |
| Semesters | Winter |
| Completion | Assessment + Examination |
| Language of teaching | Czech |
| Extent of teaching | 2P+2L |
Annotation
Main responsibilities of integrated circuits designer; design abstraction levels - Y chart. Specification designation, feasibility study, criteria for technology and design kits selection. Analogue and digital integrated systems design and simulation methodologies. Main features of application specific ICs - full custom design, gate arrays, standard cells, programmable array logic. Design aspects mobile and low power systems. Hardware Description languages (HDL). Logic and physical synthesis. Frond End and Back End design. Floorplanning, place and route, layout, parasitic extraction, time analysis, testbenche construction and verification.
Study targets
No data.
Course outlines
1. Main tasks of analogue and digital integrated circuits designer; design methodologies (top down, bottom up), design abstraction levels - Y chart.
2. Application specific integrated circuits systems types, full custom design, gate array, standard cells, programmable array logic; main features, economical aspect of the design.
3. Full customs integrated systems, feasibility study, specification, criteria for technology and design kits selection.
4. World standards and CAD tools for analog and mix-signal integrated circuits design, design of RF and mobile low power systems.
5. Design tools for automatic generation of analog behavior models, bottom up design methodology, macro blocks.
6. Design principles of mix-signal integrated circuits, purpose of hierarchical design, digital and analogue block interface, CAD design tools for automatic circuit generation; functional and static time analysis, formal verification; Verilog-A, Verilog-AMS, VHDL-A.
7. Hardware description languages -VHDL, Verilog, Verilog-A, Verilog-AMS.
8. Design tools and methodologies for digital integrated circuits and systems; language VHDL, Verilog; library cells; parameters extractions for library cells development.
9. Frond end design - functional specification, RTL, logic synthesis, Gate-level netlist, behavioral stimulus extraction.
10. Back End design - specification of Design Kit, mapping of the design, Floorplanning, place and route, layout, parasitic extraction, layout versus schema check (LVS).
11. Methods of physical synthesis, placement of functional blocks, power lines design and distribution, simulation of interconnect continuity, design verification.
12. Clock signal distribution, delay calculating, static and dynamic timing analysis.
13. Testing, design of testbenches, design verification methods.
14. Tape out and fabrication, integrated systems verification, scaling and design mapping to different technologies.
2. Application specific integrated circuits systems types, full custom design, gate array, standard cells, programmable array logic; main features, economical aspect of the design.
3. Full customs integrated systems, feasibility study, specification, criteria for technology and design kits selection.
4. World standards and CAD tools for analog and mix-signal integrated circuits design, design of RF and mobile low power systems.
5. Design tools for automatic generation of analog behavior models, bottom up design methodology, macro blocks.
6. Design principles of mix-signal integrated circuits, purpose of hierarchical design, digital and analogue block interface, CAD design tools for automatic circuit generation; functional and static time analysis, formal verification; Verilog-A, Verilog-AMS, VHDL-A.
7. Hardware description languages -VHDL, Verilog, Verilog-A, Verilog-AMS.
8. Design tools and methodologies for digital integrated circuits and systems; language VHDL, Verilog; library cells; parameters extractions for library cells development.
9. Frond end design - functional specification, RTL, logic synthesis, Gate-level netlist, behavioral stimulus extraction.
10. Back End design - specification of Design Kit, mapping of the design, Floorplanning, place and route, layout, parasitic extraction, layout versus schema check (LVS).
11. Methods of physical synthesis, placement of functional blocks, power lines design and distribution, simulation of interconnect continuity, design verification.
12. Clock signal distribution, delay calculating, static and dynamic timing analysis.
13. Testing, design of testbenches, design verification methods.
14. Tape out and fabrication, integrated systems verification, scaling and design mapping to different technologies.
Exercises outlines
1. CADENCE design system
2. CMOS Design kit description, library cells
3. Demonstration of mix-signal design - hierarchical structuring, design cells abstraction.
4. Demonstration of mix-signal design - simulations, interface definition, Spectre AMS simulator, corner analysis.
5. Analogue layout, parasitic extraction, design rule check, postlayout simulation.
6. Demonstration of mix-signal design - digital flow, back end, frond end.
7. Digital layout (Back End design), Floorplanning, routing, timing analysis.
8. Student project - design of mix-signal IC.
9. Student project - design of mix-signal IC.
10. Student project - design of mix-signal IC.
11. Student project - design of mix-signal IC.
12. Student project - design of mix-signal IC.
13. Student project - design of mix-signal IC.
14. Student project presentation, final assessment.
2. CMOS Design kit description, library cells
3. Demonstration of mix-signal design - hierarchical structuring, design cells abstraction.
4. Demonstration of mix-signal design - simulations, interface definition, Spectre AMS simulator, corner analysis.
5. Analogue layout, parasitic extraction, design rule check, postlayout simulation.
6. Demonstration of mix-signal design - digital flow, back end, frond end.
7. Digital layout (Back End design), Floorplanning, routing, timing analysis.
8. Student project - design of mix-signal IC.
9. Student project - design of mix-signal IC.
10. Student project - design of mix-signal IC.
11. Student project - design of mix-signal IC.
12. Student project - design of mix-signal IC.
13. Student project - design of mix-signal IC.
14. Student project presentation, final assessment.
Literature
Michael Smith: Application-Specific Integrated Circuits, Addison-Wesley, 1998
P. Gray, P Hurst, s. Lewis, R. Mayer: Analysis and Design of Analog Integrated Circuits, John Wiley and Sons, 2000
P. Gray, P Hurst, s. Lewis, R. Mayer: Analysis and Design of Analog Integrated Circuits, John Wiley and Sons, 2000
Requirements
The students are expected to have a good understanding of the electronic components principle (unipolar and bipolar transistor, etc.) and electronics circuit analysis. Students are expected to have knowledge of modelling and simulation of electronic circuits.
Systems on Chip - AD4M34ISC
| Credits | 6 |
| Semesters | Summer |
| Completion | Assessment + Examination |
| Language of teaching | Czech |
| Extent of teaching | 14KP+6KC |
Annotation
Main responsibilities of integrated circuits designer; design abstraction levels - Y chart. Specification designation, feasibility study, criteria for technology and design kits selection. Analogue and digital integrated systems design and simulation methodologies. Main features of application specific ICs - full custom design, gate arrays, standard cells, programmable array logic. Design aspects mobile and low power systems. Hardware Description languages (HDL). Logic and physical synthesis. Frond End and Back End design. Floorplanning, place and route, layout, parasitic extraction, time analysis, testbenche construction and verification.
Study targets
No data.
Course outlines
1. Main tasks of analogue and digital integrated circuits designer; design methodologies (top down, bottom up), design abstraction levels - Y chart.
2. Application specific integrated circuits systems types, full custom design, gate array, standard cells, programmable array logic; main features, economical aspect of the design.
3. Full customs integrated systems, feasibility study, specification, criteria for technology and design kits selection.
4. World standards and CAD tools for analog and mix-signal integrated circuits design, design of RF and mobile low power systems.
5. Design tools for automatic generation of analog behavior models, bottom up design methodology, macro blocks.
6. Design principles of mix-signal integrated circuits, purpose of hierarchical design, digital and analogue block interface, CAD design tools for automatic circuit generation; functional and static time analysis, formal verification; Verilog-A, Verilog-AMS, VHDL-A.
7. Hardware description languages -VHDL, Verilog, Verilog-A, Verilog-AMS.
8. Design tools and methodologies for digital integrated circuits and systems; language VHDL, Verilog; library cells; parameters extractions for library cells development.
9. Frond end design - functional specification, RTL, logic synthesis, Gate-level netlist, behavioral stimulus extraction.
10. Back End design - specification of Design Kit, mapping of the design, Floorplanning, place and route, layout, parasitic extraction, layout versus schema check (LVS).
11. Methods of physical synthesis, placement of functional blocks, power lines design and distribution, simulation of interconnect continuity, design verification.
12. Clock signal distribution, delay calculating, static and dynamic timing analysis.
13. Testing, design of testbenches, design verification methods.
14. Tape out and fabrication, integrated systems verification, scaling and design mapping to different technologies.
2. Application specific integrated circuits systems types, full custom design, gate array, standard cells, programmable array logic; main features, economical aspect of the design.
3. Full customs integrated systems, feasibility study, specification, criteria for technology and design kits selection.
4. World standards and CAD tools for analog and mix-signal integrated circuits design, design of RF and mobile low power systems.
5. Design tools for automatic generation of analog behavior models, bottom up design methodology, macro blocks.
6. Design principles of mix-signal integrated circuits, purpose of hierarchical design, digital and analogue block interface, CAD design tools for automatic circuit generation; functional and static time analysis, formal verification; Verilog-A, Verilog-AMS, VHDL-A.
7. Hardware description languages -VHDL, Verilog, Verilog-A, Verilog-AMS.
8. Design tools and methodologies for digital integrated circuits and systems; language VHDL, Verilog; library cells; parameters extractions for library cells development.
9. Frond end design - functional specification, RTL, logic synthesis, Gate-level netlist, behavioral stimulus extraction.
10. Back End design - specification of Design Kit, mapping of the design, Floorplanning, place and route, layout, parasitic extraction, layout versus schema check (LVS).
11. Methods of physical synthesis, placement of functional blocks, power lines design and distribution, simulation of interconnect continuity, design verification.
12. Clock signal distribution, delay calculating, static and dynamic timing analysis.
13. Testing, design of testbenches, design verification methods.
14. Tape out and fabrication, integrated systems verification, scaling and design mapping to different technologies.
Exercises outlines
1. CADENCE design system
2. CMOS Design kit description, library cells
3. Demonstration of mix-signal design - hierarchical structuring, design cells abstraction.
4. Demonstration of mix-signal design - simulations, interface definition, Spectre AMS simulator, corner analysis.
5. Analogue layout, parasitic extraction, design rule check, postlayout simulation.
6. Demonstration of mix-signal design - digital flow, back end, frond end.
7. Digital layout (Back End design), Floorplanning, routing, timing analysis.
8. Student project - design of mix-signal IC.
9. Student project - design of mix-signal IC.
10. Student project - design of mix-signal IC.
11. Student project - design of mix-signal IC.
12. Student project - design of mix-signal IC.
13. Student project - design of mix-signal IC.
14. Student project presentation, final assessment.
2. CMOS Design kit description, library cells
3. Demonstration of mix-signal design - hierarchical structuring, design cells abstraction.
4. Demonstration of mix-signal design - simulations, interface definition, Spectre AMS simulator, corner analysis.
5. Analogue layout, parasitic extraction, design rule check, postlayout simulation.
6. Demonstration of mix-signal design - digital flow, back end, frond end.
7. Digital layout (Back End design), Floorplanning, routing, timing analysis.
8. Student project - design of mix-signal IC.
9. Student project - design of mix-signal IC.
10. Student project - design of mix-signal IC.
11. Student project - design of mix-signal IC.
12. Student project - design of mix-signal IC.
13. Student project - design of mix-signal IC.
14. Student project presentation, final assessment.
Literature
Michael Smith: Application-Specific Integrated Circuits, Addison-Wesley,
1998
P. Gray, P Hurst, s. Lewis, R. Mayer: Analysis and Design of Analog
Integrated Circuits, John Wiley and Sons, 2000
E. Sinencio, A. Andreou: Low-Voltage/Low-Power Integrated Circuits and
Systems, John Wiley and Sons, 1998
Mark Zwolinski : Digital System Design and VHDL , Prentice-Hall, 2000
1998
P. Gray, P Hurst, s. Lewis, R. Mayer: Analysis and Design of Analog
Integrated Circuits, John Wiley and Sons, 2000
E. Sinencio, A. Andreou: Low-Voltage/Low-Power Integrated Circuits and
Systems, John Wiley and Sons, 1998
Mark Zwolinski : Digital System Design and VHDL , Prentice-Hall, 2000
Requirements
No data.
Systems on Chip - A4M34ISC
| Credits | 6 |
| Semesters | Summer |
| Completion | Assessment + Examination |
| Language of teaching | Czech |
| Extent of teaching | 2P+2C |
Annotation
Main responsibilities of integrated circuits designer; design abstraction levels - Y chart. Specification designation, feasibility study, criteria for technology and design kits selection. Analogue and digital integrated systems design and simulation methodologies. Main features of application specific ICs - full custom design, gate arrays, standard cells, programmable array logic. Design aspects mobile and low power systems. Hardware Description languages (HDL). Logic and physical synthesis. Frond End and Back End design. Floorplanning, place and route, layout, parasitic extraction, time analysis, testbenche construction and verification.
Study targets
No data.
Course outlines
1. Main tasks of analogue and digital integrated circuits designer; design methodologies (top down, bottom up), design abstraction levels - Y chart.
2. Application specific integrated circuits systems types, full custom design, gate array, standard cells, programmable array logic; main features, economical aspect of the design.
3. Full customs integrated systems, feasibility study, specification, criteria for technology and design kits selection.
4. World standards and CAD tools for analog and mix-signal integrated circuits design, design of RF and mobile low power systems.
5. Design tools for automatic generation of analog behavior models, bottom up design methodology, macro blocks.
6. Design principles of mix-signal integrated circuits, purpose of hierarchical design, digital and analogue block interface, CAD design tools for automatic circuit generation; functional and static time analysis, formal verification; Verilog-A, Verilog-AMS, VHDL-A.
7. Hardware description languages -VHDL, Verilog, Verilog-A, Verilog-AMS.
8. Design tools and methodologies for digital integrated circuits and systems; language VHDL, Verilog; library cells; parameters extractions for library cells development.
9. Frond end design - functional specification, RTL, logic synthesis, Gate-level netlist, behavioral stimulus extraction.
10. Back End design - specification of Design Kit, mapping of the design, Floorplanning, place and route, layout, parasitic extraction, layout versus schema check (LVS).
11. Methods of physical synthesis, placement of functional blocks, power lines design and distribution, simulation of interconnect continuity, design verification.
12. Clock signal distribution, delay calculating, static and dynamic timing analysis.
13. Testing, design of testbenches, design verification methods.
14. Tape out and fabrication, integrated systems verification, scaling and design mapping to different technologies.
2. Application specific integrated circuits systems types, full custom design, gate array, standard cells, programmable array logic; main features, economical aspect of the design.
3. Full customs integrated systems, feasibility study, specification, criteria for technology and design kits selection.
4. World standards and CAD tools for analog and mix-signal integrated circuits design, design of RF and mobile low power systems.
5. Design tools for automatic generation of analog behavior models, bottom up design methodology, macro blocks.
6. Design principles of mix-signal integrated circuits, purpose of hierarchical design, digital and analogue block interface, CAD design tools for automatic circuit generation; functional and static time analysis, formal verification; Verilog-A, Verilog-AMS, VHDL-A.
7. Hardware description languages -VHDL, Verilog, Verilog-A, Verilog-AMS.
8. Design tools and methodologies for digital integrated circuits and systems; language VHDL, Verilog; library cells; parameters extractions for library cells development.
9. Frond end design - functional specification, RTL, logic synthesis, Gate-level netlist, behavioral stimulus extraction.
10. Back End design - specification of Design Kit, mapping of the design, Floorplanning, place and route, layout, parasitic extraction, layout versus schema check (LVS).
11. Methods of physical synthesis, placement of functional blocks, power lines design and distribution, simulation of interconnect continuity, design verification.
12. Clock signal distribution, delay calculating, static and dynamic timing analysis.
13. Testing, design of testbenches, design verification methods.
14. Tape out and fabrication, integrated systems verification, scaling and design mapping to different technologies.
Exercises outlines
1. CADENCE design system
2. CMOS Design kit description, library cells
3. Demonstration of mix-signal design - hierarchical structuring, design cells abstraction.
4. Demonstration of mix-signal design - simulations, interface definition, Spectre AMS simulator, corner analysis.
5. Analogue layout, parasitic extraction, design rule check, postlayout simulation.
6. Demonstration of mix-signal design - digital flow, back end, frond end.
7. Digital layout (Back End design), Floorplanning, routing, timing analysis.
8. Student project - design of mix-signal IC.
9. Student project - design of mix-signal IC.
10. Student project - design of mix-signal IC.
11. Student project - design of mix-signal IC.
12. Student project - design of mix-signal IC.
13. Student project - design of mix-signal IC.
14. Student project presentation, final assessment.
2. CMOS Design kit description, library cells
3. Demonstration of mix-signal design - hierarchical structuring, design cells abstraction.
4. Demonstration of mix-signal design - simulations, interface definition, Spectre AMS simulator, corner analysis.
5. Analogue layout, parasitic extraction, design rule check, postlayout simulation.
6. Demonstration of mix-signal design - digital flow, back end, frond end.
7. Digital layout (Back End design), Floorplanning, routing, timing analysis.
8. Student project - design of mix-signal IC.
9. Student project - design of mix-signal IC.
10. Student project - design of mix-signal IC.
11. Student project - design of mix-signal IC.
12. Student project - design of mix-signal IC.
13. Student project - design of mix-signal IC.
14. Student project presentation, final assessment.
Literature
Michael Smith: Application-Specific Integrated Circuits, Addison-Wesley,
1998
P. Gray, P Hurst, s. Lewis, R. Mayer: Analysis and Design of Analog
Integrated Circuits, John Wiley and Sons, 2000
E. Sinencio, A. Andreou: Low-Voltage/Low-Power Integrated Circuits and
Systems, John Wiley and Sons, 1998
Mark Zwolinski : Digital System Design and VHDL , Prentice-Hall, 2000
1998
P. Gray, P Hurst, s. Lewis, R. Mayer: Analysis and Design of Analog
Integrated Circuits, John Wiley and Sons, 2000
E. Sinencio, A. Andreou: Low-Voltage/Low-Power Integrated Circuits and
Systems, John Wiley and Sons, 1998
Mark Zwolinski : Digital System Design and VHDL , Prentice-Hall, 2000
Requirements
No data.
Microelectronics - BD5B34MIT
| Credits | 4 |
| Semesters | Winter |
| Completion | Assessment + Examination |
| Language of teaching | Czech |
| Extent of teaching | 14KP+6KL |
Annotation
Students become familiar with the latest trends in the field of microelectronics. The course provide students with the microelectronic structures and technologies of integrated circuits; micro sensors and micro-electro-mechanical systems. The course introduces students to the design of nanoelectronics and integrated circuits.
Study targets
The aim of the course is to provide students with modern trends in the field of micro and nano electronics.
Course outlines
1. Evolution of integrated circuits and electronic systems, Moore's Law,
2. Main architectures of microelectronic systems, levels of abstraction
3. Integrated Circuits - importance of integration, technologies and design methods
4. Design methodologies and tools (overview of design technologies and its implementation)
5. Microelectronic components (Mosfet, BJT, passive components)
6. Manufacturing processes of integrated circuits
7. Passive components and power structures in microelectronics circuits
8. On chip signal processing
9. Operation principles of integrated microsensors
10. Microsystems and MEMS (Design of Micro-electro-mechanical systems MEMS, technology, applications)
11. Nanoelectronics, basic solid state physics
12. Optical integrated circuits
13. Diagnostic and testing in electronic systems
14. Reserve
2. Main architectures of microelectronic systems, levels of abstraction
3. Integrated Circuits - importance of integration, technologies and design methods
4. Design methodologies and tools (overview of design technologies and its implementation)
5. Microelectronic components (Mosfet, BJT, passive components)
6. Manufacturing processes of integrated circuits
7. Passive components and power structures in microelectronics circuits
8. On chip signal processing
9. Operation principles of integrated microsensors
10. Microsystems and MEMS (Design of Micro-electro-mechanical systems MEMS, technology, applications)
11. Nanoelectronics, basic solid state physics
12. Optical integrated circuits
13. Diagnostic and testing in electronic systems
14. Reserve
Exercises outlines
1. Introduction, Revision Test
2. Cadence Environment, Schematic, SPECTRE Simulator, Result Exports (PC Cadence)
3. Transistor based Amplifier - Technology Parameters Optimization (PC Cadence)
4. Static and Dynamic Parameters of Transistor based Amplifiers (PC Cadence)
5. Single -Stage Amplifiers CG, CD (PC Cadence)
6. Multistage Amplifiers - Parasitic Parameters Influence (PC Cadence)
7. Differential Amplifiers (PC Cadence)
8. Basic Logic Gates in CMOS Technology (INV,NAND, NOR) (PC Cadence)
9. OrCAD Environment, Schematic Editor, SPICE Simulator, Result Exports (PC OrCAD)
10. Timer Design (Astable, Bistable, Monostable Multivibrator) (PC OrCAD)
11. Timer Application - Measurement of Operating Parameters (Lab)
12. Comparator ADC Design (PC OrCAD)
13. Comparator ADC Realization and Measurement of Operating Parameters (Lab)
14. Assessment Test
2. Cadence Environment, Schematic, SPECTRE Simulator, Result Exports (PC Cadence)
3. Transistor based Amplifier - Technology Parameters Optimization (PC Cadence)
4. Static and Dynamic Parameters of Transistor based Amplifiers (PC Cadence)
5. Single -Stage Amplifiers CG, CD (PC Cadence)
6. Multistage Amplifiers - Parasitic Parameters Influence (PC Cadence)
7. Differential Amplifiers (PC Cadence)
8. Basic Logic Gates in CMOS Technology (INV,NAND, NOR) (PC Cadence)
9. OrCAD Environment, Schematic Editor, SPICE Simulator, Result Exports (PC OrCAD)
10. Timer Design (Astable, Bistable, Monostable Multivibrator) (PC OrCAD)
11. Timer Application - Measurement of Operating Parameters (Lab)
12. Comparator ADC Design (PC OrCAD)
13. Comparator ADC Realization and Measurement of Operating Parameters (Lab)
14. Assessment Test
Literature
P. Gray, P Hurst, s. Lewis, R. Mayer: Analysis and Design of Analog Integrated Circuits, John Wiley and Sons, 2000
B. Razavi: Design of Analog CMOS Integrated Circuits, McGRAW-Hill, 2001
B. Razavi: Design of Analog CMOS Integrated Circuits, McGRAW-Hill, 2001
Requirements
The students are expected to have a good understanding of the electronic components principle (unipolar and bipolar transistor, etc.) and electronics circuit analysis. Students are expected to have knowledge of modelling and simulation of electronic circuits.